The present invention relates to the field of integrated circuits. More particularly, the invention relates to controlling the generation or comparison of voltages in an integrated circuit.
An integrated circuit may be provided with voltage generating circuitry for receiving a supply voltage and generating from the supply voltage an on-chip voltage for use by circuitry within the integrated circuit. The on-chip voltage may be greater or less than the supply voltage. For example, the voltage generating circuitry may include a charge pump which uses capacitors to boost the supply voltage to provide a higher voltage to circuitry within the integrated circuit. However, the voltage generating circuitry consumes a given amount of power and it is desirable to reduce the power consumed by the voltage generating circuitry if possible. Also, sometimes different levels of the on-chip voltage may be required and so it is useful to be able to tune the voltage generation accordingly. The present technique seeks to provide a power-efficient technique for tuning the level of the on-chip voltage generated by the voltage generating circuitry.